1. Field of the Invention
The present invention relates to an equalizer and a group delay compensation circuit for the equalizer.
2. Description of the Related Art
A group delay parameter for a filter, which has implications for features of the filter, indicates time delay of a signal passing through the filter. When a sine-wave signal is applied to the filter, a resulting filter output has a sinusoidal form with time delay, thereby causing a phase difference between the input signal and the filter output signal. The group delay τg may be expressed by an equation of τg=∂θ/∂ω, wherein θ denotes a phase, and ω represents an angular frequency. That is, the group delay may represent a phase variance relative to a variance of the angular frequency.
The group delay may be disadvantageous in that it may cause a signal distortion. Generally, a modulated input signal has respective sidebands at both ends of a carrier frequency. When the group delay occurs in such an input signal including at least two frequencies, time delays according to respective frequencies may cause different phase delays. Therefore, the input signal provided to the filter may be distorted due to the different phase delays.
FIG. 1 is a circuit diagram illustrating a conventional equalizer circuit. An equalizer circuit may be used to compensate group delay characteristics and to reduce the signal distortion in a broad band of frequencies. Referring to the FIG. 1, the conventional equalizer circuit may include a biquadratic filter 102, a transconductor 104 and a capacitor C3. The transconductor 104 and the capacitor C3 may be connected to the biquadratic filter 102 as shown in FIG. 1.
The biquadratic filter 102 has a transfer function whose numerator and denominator are expressed by a second order function. The transconductor 104 and the capacitor C3 may be additionally installed as part of the biquadratic filter 102 so as to prevent a deterioration of the group delay characteristics due to a parasitic resistance and a parasitic capacitance of the biquadratic filter 102.
The additional capacitor C3 may take up a relatively large area on a semiconductor substrate. In addition, an error in the transfer function generated by the parasitic resistance and capacitance needs to be reduced and/or compensated. The problem may be addressed by matching a transconductance Gm1 of the transconductor 104 with the capacitor C3. However, in matching the transconductance Gm1 and the capacitor C3, manufacturing process margins for the semiconductor may be limited, such that certain electric characteristics of the equalizer circuit may not be guaranteed.